Embracing local variability to enable a robust high-gain positive-feedback amplifier: Design methodology and implementation

Kareem Ragab, R. Gharpurey, M. Orshansky
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引用次数: 5

Abstract

A novel digital calibration technique based on component redundancy and random diversity (CRRD) is used to enable robust high-gain positive-feedback (PF) amplifiers. Gain enhancement is achieved through output conductance cancellation which requires accurate calibration across process, voltage, and temperature. CRRD employs a set of redundant elements intentionally exhibiting high local variability, and the subset of the elements that best cancels amplifier's output conductance is employed. We develop a novel design methodology to rigorously predict: (1) how to partition the full configuration range between a fixed load and a tunable load, and (2) how, for a given partition, to size the tunable load elements. We prove that having a sizable coarse load is essential for reaching optimality. We apply the developed theory to the design of a 0.18μm CMOS test-chip implementing a 6×10 array of high-gain PF amplifiers based on CRRD. We demonstrate that the use of CRRD allows only linear increase of the array size, and its associated capacitance, with dB gain improvement, in contrast to exponential increase in earlier designs. Gains of ninety amplifiers from three different dies were measured and exceeded 64dB for 95% of the samples, up from an intrinsic gain of 28.5dB. A gain-bandwidth product of 186MHz was measured while consuming 65μA from a 1.8V supply.
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采用局部可变性实现鲁棒高增益正反馈放大器:设计方法和实现
提出了一种基于元件冗余和随机分集(CRRD)的新型数字校准技术,实现了高增益正反馈(PF)放大器的鲁棒性。增益增强是通过输出电导消除实现的,这需要跨过程、电压和温度进行精确校准。CRRD采用一组冗余元件,有意地表现出高局部可变性,并采用最能抵消放大器输出电导的元件子集。我们开发了一种新颖的设计方法来严格预测:(1)如何在固定负载和可调负载之间划分完整的配置范围,以及(2)对于给定的分区,如何调整可调负载元素的大小。我们证明了具有相当大的粗负载对于达到最优性是必不可少的。我们将所开发的理论应用于0.18μm CMOS测试芯片的设计,该芯片实现了基于CRRD的6×10高增益PF放大器阵列。我们证明,与早期设计的指数增长相比,CRRD的使用只允许阵列尺寸及其相关电容的线性增长,并具有dB增益的改善。测量了来自三种不同芯片的90个放大器的增益,95%的样品的增益超过了64dB,高于28.5dB的固有增益。在1.8V电源消耗65μA的情况下,测量到186MHz的增益带宽积。
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