VS-ISA: A Video Specific Instruction Set Architecture for ASIP Design

Zheng Shen, Hu He, Yanjun Zhang, Yihe Sun
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引用次数: 15

Abstract

This paper describes a novel video specific instruction set architecture for ASIP design. With SIMD (Single Instruction Multiple Data) instructions, and video specific instructions, an instruction set architecture is introduced to enhance the performance for video applications. Furthermore, we quantify the improvement on H.263 encoding. In this paper, we evaluate and compare the performance of VS ISA (Video Specific Instruction Set Architecture), other DSPs (digital signal processors) and conventional SIMD media extensions in the context of video coding. Our evaluation results show that VS ISA improves the processor¿s performance by approximate 5x on H.263 encoding, and VS ISA outperforms other architectures by 1.6x to 8.57x in computing IDCT.
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面向ASIP设计的视频专用指令集体系结构
本文介绍了一种用于ASIP设计的新型视频专用指令集体系结构。通过单指令多数据(SIMD)指令和视频专用指令,引入了一种指令集架构,以提高视频应用的性能。此外,我们量化了H.263编码的改进。在本文中,我们在视频编码的背景下评估和比较了VS ISA(视频特定指令集架构),其他dsp(数字信号处理器)和传统SIMD媒体扩展的性能。我们的评估结果表明,VS ISA在H.263编码上的处理器性能提高了约5倍,在计算IDCT方面,VS ISA比其他架构的性能提高了1.6倍至8.57倍。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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