D. Patterson, Arvind, K. Asanović, Derek Chiou, J. Hoe, C. Kozyrakis, Shih-Lien Lu, M. Oskin, J. Rabaey, J. Wawrzynek
{"title":"Research accelerator for multiple processors","authors":"D. Patterson, Arvind, K. Asanović, Derek Chiou, J. Hoe, C. Kozyrakis, Shih-Lien Lu, M. Oskin, J. Rabaey, J. Wawrzynek","doi":"10.1109/HOTCHIPS.2006.7477751","DOIUrl":null,"url":null,"abstract":"This article consists of a collection of slides from the author's conference presentation on RAMP, or research acclerators for multiple processors. Some of the specific topics discussed include: system specifications and architecture; uniprocessor performance capabilities; RAMP hardware and description language features; RAMP applications development; storage capabilities; and future areas of technological development.","PeriodicalId":302249,"journal":{"name":"2006 IEEE Hot Chips 18 Symposium (HCS)","volume":"150 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"53","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 IEEE Hot Chips 18 Symposium (HCS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/HOTCHIPS.2006.7477751","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 53
Abstract
This article consists of a collection of slides from the author's conference presentation on RAMP, or research acclerators for multiple processors. Some of the specific topics discussed include: system specifications and architecture; uniprocessor performance capabilities; RAMP hardware and description language features; RAMP applications development; storage capabilities; and future areas of technological development.
京公网安备 11010802042870号
京ICP备2023020795号-1
分享
求助内容：
应助结果提醒方式：
扫码关注我们
