The Arm Triple Core Lock-Step (TCLS) Processor

X. Iturbe, Balaji Venu, Emre Ozer, Jean-Luc Poupat, Gregoire Gimenez, Hans-Ulrich Zurek
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引用次数: 22

Abstract

The Arm Triple Core Lock-Step (TCLS) architecture is the natural evolution of Arm Cortex-R Dual Core Lock-Step (DCLS) processors to increase dependability, predictability, and availability in safety-critical and ultra-reliable applications. TCLS is simple, scalable, and easy to deploy in applications where Arm DCLS processors are widely used (e.g., automotive), as well as in new sectors where the presence of Arm technology is incipient (e.g., enterprise) or almost non-existent (e.g., space). Specifically in space, COTS Arm processors provide optimal power-to-performance, extensibility, evolvability, software availability, and ease of use, especially in comparison with the decades old rad-hard computing solutions that are still in use. This article discusses the fundamentals of an Arm Cortex-R5 based TCLS processor, providing key functioning and implementation details. The article shows that the TCLS architecture keeps the use of rad-hard technology to a minimum, namely, using rad-hard by design standard cell libraries only to protect the critical parts that account for less than 4% of the entire TCLS solution. Moreover, when exposure to radiation is relatively low, such as in terrestrial applications or even satellites operating in Low Earth Orbits (LEO), the system could be implemented entirely using commercial cell libraries, relying on the radiation mitigation methods implemented on the TCLS to cope with sporadic soft errors in its critical parts. The TCLS solution allows thus to significantly reduce chip manufacturing costs and keep pace with advances in low power consumption and high density integration by leveraging commercial semiconductor processes, while matching the reliability levels and improving availability that can be achieved using extremely expensive rad-hard semiconductor processes. Finally, the article describes a TRL4 proof-of-concept TCLS-based System-on-Chip (SoC) that has been prototyped and tested to power the computer on-board an Airbus Defence and Space telecom satellite. When compared to the currently used processor solution by Airbus, the TCLS-based SoC results in a more than 5× performance increase and cuts power consumption by more than half.
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Arm三核锁步(TCLS)处理器
Arm三核锁步(TCLS)架构是Arm Cortex-R双核锁步(DCLS)处理器的自然演变,旨在提高安全性关键和超可靠应用的可靠性、可预测性和可用性。TCLS简单,可扩展,并且易于部署在广泛使用Arm DCLS处理器的应用程序中(例如,汽车),以及在Arm技术刚刚出现的新领域(例如,企业)或几乎不存在的领域(例如,空间)。特别是在太空中,COTS Arm处理器提供了最佳的功率到性能、可扩展性、可演化性、软件可用性和易用性,特别是与仍在使用的几十年前的硬计算解决方案相比。本文讨论了基于Arm Cortex-R5的TCLS处理器的基本原理,提供了关键功能和实现细节。本文表明,TCLS体系结构将rad-hard技术的使用保持在最低限度,即,通过设计标准单元库使用rad-hard仅用于保护占整个TCLS解决方案不到4%的关键部分。此外,当辐射暴露相对较低时,例如在地面应用中,甚至在低地球轨道(LEO)上运行的卫星中,该系统可以完全使用商业小区库来实施,依靠在TCLS上实施的辐射减缓方法来应对其关键部分的零星软错误。因此,TCLS解决方案可以显著降低芯片制造成本,并通过利用商业半导体工艺来跟上低功耗和高密度集成的发展步伐,同时匹配可靠性水平并提高可用性,这可以使用极其昂贵的雷达硬半导体工艺来实现。最后,本文描述了基于tcls的TRL4概念验证片上系统(SoC),该系统已经原型化并进行了测试,用于为空中客车国防和空间电信卫星上的计算机提供动力。与空客目前使用的处理器解决方案相比,基于tcls的SoC性能提高了5倍以上,功耗降低了一半以上。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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