Design and implementation of modulator ASIC for CDMA WLL system

J. Lee, Y. Jeong, K. Ha
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Abstract

We present the design and implementation of modulator ASIC in a direct sequence code division multiple access (DS-CDMA) wireless local loop (WLL) system. The WLL system consists of two links: one is a forward link (fixed station-mobile); the other is a reverse link (mobile-fixed station). We only consider the issues of the ASIC design and implementation in the forward link. We present an efficient structure of the forward link in the WLL system. According to the proposed structure, the modulator ASIC is composed of two channels which perform channel coding, block interleaving and spreading, and with four baseband filters. The ASIC is fabricated using a 0.6 /spl mu/m CMOS process with 40 k gates and was successfully tested on a WLL test-bed system.
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CDMA WLL系统调制器专用集成电路的设计与实现
介绍了直接顺序码分多址(DS-CDMA)无线本地环路(WLL)系统中调制器ASIC的设计与实现。WLL系统由两条链路组成:一条是前向链路(固定台-移动);另一种是反向链接(移动-固定站)。我们只考虑ASIC设计和实现的问题。提出了一种有效的WLL系统前向链路结构。根据所提出的结构,调制器ASIC由两个执行信道编码、块交错和扩展的通道组成,并带有四个基带滤波器。ASIC采用0.6 /spl mu/m CMOS工艺和40 k栅极制造,并在WLL测试平台系统上成功测试。
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