Martina C. Rodrigues, J. L. J. Brum, A. Girardi, L. Severo, P. D. de Aguirre
{"title":"A 0.5-V 10-bit Asynchronous SAR ADC with Monotonic Switching for Biomedical Applications","authors":"Martina C. Rodrigues, J. L. J. Brum, A. Girardi, L. Severo, P. D. de Aguirre","doi":"10.1109/CAE56623.2023.10086972","DOIUrl":null,"url":null,"abstract":"In recent years, it is possible to observe a quickly adoption and daily use of wearable electronic devices such as smart watches and bracelets. Such devices have dedicated systems for monitoring biological signals, such as heartbeat and blood oxidation, and some of these devices already have the ability to provide measurements of electrocardiogram (ECG) and blood pressure signals. Additionally, these devices also feature wireless connection via Bluetooth orWi-Fi communication protocols. Both modern instrumentation and communication systems require the digitization of analog signals by means of analog-to-digital convertes (ADCs) for further digital signal processing. This work presents the design of a Successive Approximation Register (SAR) ADC for low voltage applications with 10 bits and 5 kSPS in asynchronous operating mode. The ADC is designed in 180-nm CMOS technology and operates at a nominal supply voltage of 0.5 V. Schematic-level simulations indicate that the ADC reaches a signal-to-noise-to-distortion (SNDR) ratio of 61.36 dB, leading to an effective number of bits (ENOB) of 9.90 bits. The spurious-free dynamic range (SFDR) is 73.19 dB, and the total power consumption of the ADC is 1.43 μW.","PeriodicalId":212534,"journal":{"name":"2023 Argentine Conference on Electronics (CAE)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-03-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 Argentine Conference on Electronics (CAE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CAE56623.2023.10086972","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
In recent years, it is possible to observe a quickly adoption and daily use of wearable electronic devices such as smart watches and bracelets. Such devices have dedicated systems for monitoring biological signals, such as heartbeat and blood oxidation, and some of these devices already have the ability to provide measurements of electrocardiogram (ECG) and blood pressure signals. Additionally, these devices also feature wireless connection via Bluetooth orWi-Fi communication protocols. Both modern instrumentation and communication systems require the digitization of analog signals by means of analog-to-digital convertes (ADCs) for further digital signal processing. This work presents the design of a Successive Approximation Register (SAR) ADC for low voltage applications with 10 bits and 5 kSPS in asynchronous operating mode. The ADC is designed in 180-nm CMOS technology and operates at a nominal supply voltage of 0.5 V. Schematic-level simulations indicate that the ADC reaches a signal-to-noise-to-distortion (SNDR) ratio of 61.36 dB, leading to an effective number of bits (ENOB) of 9.90 bits. The spurious-free dynamic range (SFDR) is 73.19 dB, and the total power consumption of the ADC is 1.43 μW.