Host Efficient Networking Stack Utilizing NIC DRAM

Abstract

The growth in host resource and network speed is not synchronized, and the status quo of this imbalance from the network speed of 100 ∼ Gbps makes the host resource the bottleneck. We categorize existing body of work to reduce the host burden into the following three approaches: (1) to eliminate payload copy (zero-copy), (2) to utilize special-purpose hardware for payload copy, and (3) to offload protocol to NIC. Each approach, however, has drawbacks. (1) Most zero-copy methods require application modification. Furthermore, the application must ensure its buffer is not modified until network I/O is complete. (2) Copy elimination through special-purpose hardware still uses host memory, consuming considerable memory bandwidth. (3) The protocol offloaded to NIC has limited flexibility. We redesign the networking stack placing only the payload in the NIC DRAM and executing protocol processing in the host to overcome the above limitations. Our work (1) makes the application reuse its own buffer as soon as the payload is transferred data in the NIC DRAM and does not require application modification, (2) saves host memory bandwidth by putting packet payload in NIC and eliminating payload copying on the host, and (3) maintains flexibility by keeping protocol processing on the host. Compared to the networking stack with CPU-based copy, our work saves 38.6% of CPU usage and 54.0% of memory bandwidth.