Design and Analysis of ALU for Low Power IOT Centric Processor Architectures

Abstract

This research work proposed a low powered design of arithmetic and logical unit for IOT centric processor architectures. As ALU is the main computation contraption in almost all the processors and controllers architectures deployed on IOT boards, due to which there is a high probability of switching that leads to high dissipation of power in the chip. The proposed architecture of ALU used the combination of clock gating and one hot coding technique termed as CGOH which ensures less switching activity and unique selection of distinct operations at that instant of time. The proposed architecture has been coded in VHDL & tested using Xpower Analyser available in Xilinx ISE 14.1 for different IOT centric processor architectures. The results are analysed and tested for different frequencies as per processor architecture on Virtex FPGA and shows significant power improvement as frequency increases towards higher range.