D. Neilson, D. Goodwill, L. C. Wilkinson, F. Tooley, A. Walker, C. Stanley, M. Mcelhinney, F. Pottier
{"title":"InGaAs Transceivers for Smart Pixels","authors":"D. Neilson, D. Goodwill, L. C. Wilkinson, F. Tooley, A. Walker, C. Stanley, M. Mcelhinney, F. Pottier","doi":"10.1364/optcomp.1995.otuc3","DOIUrl":null,"url":null,"abstract":"A promising route for the construction of smart pixels is to flip-chip bond III-V semiconductor devices as detectors[1] and modulators onto silicon circuitry. InGaAs quantum well devices grown on GaAs substrates and operating at around 1 μm provide a good option for the III-V devices since there are high power lasers available including Nd:YLF at 1047nm and substrate removal is not necessary. Silicon CMOS is attractive for the electronics since it is a mature technology, allows very high packing density and has the low power consumption necessary for systems based on many channels each with a high degree of smartness. In our work we have so far used 1 μm double metal n-well CMOS and future devices will be fabricated using 0.7/0.8 μm CMOS. The CMOS process limits the available voltage swing for driving the InGaAs modulators to 5 V.","PeriodicalId":302010,"journal":{"name":"Optical Computing","volume":"87 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Optical Computing","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1364/optcomp.1995.otuc3","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
A promising route for the construction of smart pixels is to flip-chip bond III-V semiconductor devices as detectors[1] and modulators onto silicon circuitry. InGaAs quantum well devices grown on GaAs substrates and operating at around 1 μm provide a good option for the III-V devices since there are high power lasers available including Nd:YLF at 1047nm and substrate removal is not necessary. Silicon CMOS is attractive for the electronics since it is a mature technology, allows very high packing density and has the low power consumption necessary for systems based on many channels each with a high degree of smartness. In our work we have so far used 1 μm double metal n-well CMOS and future devices will be fabricated using 0.7/0.8 μm CMOS. The CMOS process limits the available voltage swing for driving the InGaAs modulators to 5 V.