InGaAs Transceivers for Smart Pixels

D. Neilson, D. Goodwill, L. C. Wilkinson, F. Tooley, A. Walker, C. Stanley, M. Mcelhinney, F. Pottier
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引用次数: 2

Abstract

A promising route for the construction of smart pixels is to flip-chip bond III-V semiconductor devices as detectors[1] and modulators onto silicon circuitry. InGaAs quantum well devices grown on GaAs substrates and operating at around 1 μm provide a good option for the III-V devices since there are high power lasers available including Nd:YLF at 1047nm and substrate removal is not necessary. Silicon CMOS is attractive for the electronics since it is a mature technology, allows very high packing density and has the low power consumption necessary for systems based on many channels each with a high degree of smartness. In our work we have so far used 1 μm double metal n-well CMOS and future devices will be fabricated using 0.7/0.8 μm CMOS. The CMOS process limits the available voltage swing for driving the InGaAs modulators to 5 V.
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智能像素的InGaAs收发器
构建智能像素的一个有前途的途径是将键合III-V半导体器件作为探测器[1]和调制器倒装到硅电路上。在GaAs衬底上生长并工作在1 μm左右的InGaAs量子阱器件为III-V器件提供了一个很好的选择,因为有高功率激光器可用,包括1047nm的Nd:YLF,并且不需要去除衬底。硅CMOS对电子产品具有吸引力,因为它是一种成熟的技术,允许非常高的封装密度,并且具有基于多个通道的系统所需的低功耗,每个通道都具有高度的智能。在我们的工作中,我们目前使用的是1 μm双金属n阱CMOS,未来的器件将使用0.7/0.8 μm CMOS。CMOS工艺将驱动InGaAs调制器的可用电压摆幅限制在5 V。
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