Influence of gate and drain bias on the bias-stress stability of flexible organic thin-film transistors

Abstract

In this paper, the influence of gate-source and drain-source bias on the bias-stress stability and lifetime of pentacene-based low-voltage (-3 V) organic thin-film transistors (TFTs) built on plastic substrate has been investigated. The 10%-current-decay lifetime is used for analyzing the influence of applied bias on the bias-stress stability of TFTs, and to compare various biasing conditions. Our results show a 3 to 4 times higher 10%-current-decay lifetime when magnitude of gate-source and drain-source voltage are equal and less than 2.5 V during bias stress, compared to that when drain-source voltage is kept at -3.0 V.