G-TSC: Timestamp Based Coherence for GPUs

Abdulaziz Tabbakh, Xuehai Qian, M. Annavaram
{"title":"G-TSC: Timestamp Based Coherence for GPUs","authors":"Abdulaziz Tabbakh, Xuehai Qian, M. Annavaram","doi":"10.1109/HPCA.2018.00042","DOIUrl":null,"url":null,"abstract":"Cache coherence has been studied extensively in the context of chip multiprocessors (CMP). It is well known that conventional directory-based and snooping coherence protocols generate considerable coherence traffic as the number of hardware thread contexts increase. Since GPUs support hundreds or even thousands of threads, conventional coherence mechanisms when applied to GPUs will exacerbate the the bandwidth constraints that GPUs already face. Recognizing this constraint, prior work has proposed time-based coherence protocols. The main idea is to assign a lease period to the accessed cache block, and after the lease expires the cache block is self-invalidated. However, time-based coherence protocols require global synchronized clocks. Furthermore, this approach may increase execution stalls since threads have to wait to access data with an unexpired lease. Tardis is timestamp-based coherence protocol that has been proposed recently to alleviate the need for global clocks in CPUs. This paper builds on this prior work and proposes G-TSC, a novel cache coherence protocol for GPUs that is based on timestamp ordering. G-TSC conducts its coherence transactions in logical time. This work demonstrates the challenges in adopting timestamp coherence for GPUs which support massive thread parallelism and have unique microarchitecture features. This work then presents a number of solutions that tackle GPU-centric challenges. Evaluation of G-TSC implemented in the GPGPU-Sim simulation framework shows that G-TSC outperforms time-based coherence by 38% with release consistency.","PeriodicalId":154694,"journal":{"name":"2018 IEEE International Symposium on High Performance Computer Architecture (HPCA)","volume":"46 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"14","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE International Symposium on High Performance Computer Architecture (HPCA)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/HPCA.2018.00042","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 14

Abstract

Cache coherence has been studied extensively in the context of chip multiprocessors (CMP). It is well known that conventional directory-based and snooping coherence protocols generate considerable coherence traffic as the number of hardware thread contexts increase. Since GPUs support hundreds or even thousands of threads, conventional coherence mechanisms when applied to GPUs will exacerbate the the bandwidth constraints that GPUs already face. Recognizing this constraint, prior work has proposed time-based coherence protocols. The main idea is to assign a lease period to the accessed cache block, and after the lease expires the cache block is self-invalidated. However, time-based coherence protocols require global synchronized clocks. Furthermore, this approach may increase execution stalls since threads have to wait to access data with an unexpired lease. Tardis is timestamp-based coherence protocol that has been proposed recently to alleviate the need for global clocks in CPUs. This paper builds on this prior work and proposes G-TSC, a novel cache coherence protocol for GPUs that is based on timestamp ordering. G-TSC conducts its coherence transactions in logical time. This work demonstrates the challenges in adopting timestamp coherence for GPUs which support massive thread parallelism and have unique microarchitecture features. This work then presents a number of solutions that tackle GPU-centric challenges. Evaluation of G-TSC implemented in the GPGPU-Sim simulation framework shows that G-TSC outperforms time-based coherence by 38% with release consistency.
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G-TSC:基于时间戳的gpu相干性
在芯片多处理器(CMP)的背景下,缓存一致性已经得到了广泛的研究。众所周知,随着硬件线程上下文数量的增加,传统的基于目录和窥探一致性协议会产生相当大的一致性流量。由于gpu支持数百甚至数千个线程,传统的相干机制应用于gpu时将加剧gpu已经面临的带宽限制。认识到这一限制,先前的工作已经提出了基于时间的相干协议。其主要思想是为被访问的缓存块分配一个租期,租期到期后,缓存块将自行失效。然而,基于时间的相干协议需要全局同步时钟。此外,这种方法可能会增加执行延迟,因为线程必须等待访问具有未过期租约的数据。Tardis是最近提出的基于时间戳的一致性协议,以减轻cpu对全局时钟的需求。本文在前人工作的基础上,提出了一种基于时间戳排序的gpu缓存一致性协议G-TSC。G-TSC在逻辑时间内进行相干事务处理。这项工作证明了在支持大规模线程并行性和具有独特微架构特征的gpu中采用时间戳一致性所面临的挑战。这项工作随后提出了一些解决以gpu为中心的挑战的解决方案。对GPGPU-Sim仿真框架下实现的G-TSC的评估表明,在释放一致性方面,G-TSC比基于时间的相干性高出38%。
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