Floating-Point Double-Humped Chaotic Image Encryption on FPGA

Abstract

Chaos-based image encryption systems have drawn the attention of researchers in the data security field tremendously over the past few years. In this paper, an image encryption system based on generalized Double-Humped logistic map is designed and implemented on Virtex-5 FPGA platform. Due to the high sensitivity of chaotic functions, floating-point data representation is adopted to achieve high precision and accuracy of results compared to system simulations. The proposed hard-ware design of the encryption system fits the simulation results exactly, and validated with practical implementation, achieving clock frequency of 350 MHz.