"Watts" the matter: power reduction issues

Abstract

Technology continues to shrink lithographic images producing smaller chips which require lower voltages. The lower voltage has helped the overall power dissipation per device, but the number of devices that can be integrated has increased by a faster rate. The result is often power-constrained designs. To help alleviate the explosion in power, designers have been faced with many design challenges. Clock power management is now the norm with multiple operation modes. On-board dynamic frequency adjustment and temperature detectors are now employed to ensure that the product does not exceed its maximum thermal limits. Another aspect of power management is the use of multiple voltages. The author discusses power management from a packaging perspective and concludes that power efficiency has become a mandate for success.