Chandra C. Sekhar, C. Nagamani, G. Saravana Ilango, S. Mageshwari
{"title":"Mitigation of High-Frequency Oscillation in a Multiport DC-DC Converter","authors":"Chandra C. Sekhar, C. Nagamani, G. Saravana Ilango, S. Mageshwari","doi":"10.1109/PEDES56012.2022.10080348","DOIUrl":null,"url":null,"abstract":"High-gain current-fed multiport dc-dc converters with hybrid energy storage systems such as low-voltage batteries and super capacitors (SCs) are commonly used in Electric Vehicle (EV) applications. Even when the battery and SC voltages fluctuate, the transformer voltages can always be perfectly matched because of easy power flow between any two ports and low circulating power. Furthermore, interleaved control reduces current ripple, which is beneficial to both batteries and SCs. In a high-frequency transformer, stray capacitance and phase shift inductance form a high-frequency oscillation (HFO), and the high dv/dt of the dual active bridge (DAB) converter degrades performance. A frequency-domain model that considers the parasitic properties of the circuit is useful in understanding the phenomenon of High-Frequency Oscillation (HFO). Based on this model, the present study reveals that the HFO can be reduced by regulating the dv/dt at the H-bridge (Primary) output voltage. If the dv/dt is very high or very low the HFO prevails. Thus, there is a specific range for the dv/dt to effectively limit the HFO. In the present study, the extent of HFO is significantly reduced by the use of parallel capacitance at the switching devices. Further, this enables soft switching and reduces the losses. The capacitance to be connected is determined by identifying the Zero Crossing Points (ZCPs) corresponding to the oscillation frequency in the DAB output voltage. The proposed model facilitates the computation of the capacitance values needed for the desired range of dv/dt that limits the HFO. This in turn helps to improve overall efficiency. Simulation results demonstrate the efficacy of the scheme.","PeriodicalId":161541,"journal":{"name":"2022 IEEE International Conference on Power Electronics, Drives and Energy Systems (PEDES)","volume":"57 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-12-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE International Conference on Power Electronics, Drives and Energy Systems (PEDES)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/PEDES56012.2022.10080348","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
High-gain current-fed multiport dc-dc converters with hybrid energy storage systems such as low-voltage batteries and super capacitors (SCs) are commonly used in Electric Vehicle (EV) applications. Even when the battery and SC voltages fluctuate, the transformer voltages can always be perfectly matched because of easy power flow between any two ports and low circulating power. Furthermore, interleaved control reduces current ripple, which is beneficial to both batteries and SCs. In a high-frequency transformer, stray capacitance and phase shift inductance form a high-frequency oscillation (HFO), and the high dv/dt of the dual active bridge (DAB) converter degrades performance. A frequency-domain model that considers the parasitic properties of the circuit is useful in understanding the phenomenon of High-Frequency Oscillation (HFO). Based on this model, the present study reveals that the HFO can be reduced by regulating the dv/dt at the H-bridge (Primary) output voltage. If the dv/dt is very high or very low the HFO prevails. Thus, there is a specific range for the dv/dt to effectively limit the HFO. In the present study, the extent of HFO is significantly reduced by the use of parallel capacitance at the switching devices. Further, this enables soft switching and reduces the losses. The capacitance to be connected is determined by identifying the Zero Crossing Points (ZCPs) corresponding to the oscillation frequency in the DAB output voltage. The proposed model facilitates the computation of the capacitance values needed for the desired range of dv/dt that limits the HFO. This in turn helps to improve overall efficiency. Simulation results demonstrate the efficacy of the scheme.