A CMOS transceiver with internal PA and digital pre-distortion for WLAN 802.11a/b/g/n Applications

Chia-Jun Chang, Po-Chih Wang, Chih-Yu Tsai, Chin-Lung Li, Chiao-Ling Chang, Han-Jung Shih, M. Tsai, Wen-Shan Wang, Ka-Un Chan, Ying-Hsi Lin
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引用次数: 18

Abstract

A 2.4/5GHz Fully-Integrated Transceiver is implemented in 65nm CMOS technology. To alleviate the cost of external front-end components, the G-mode RF transmit/receive (T/R) switch and a power-efficient linear CMOS PA are fully integrated on-chip. On the other hand, for better performance, only the A-mode PA is integrated on-chip while the external T/R switch is used. It shows 5dB and 5.5dB NF in the G-mode and A-mode receivers respectively. Also, the transmitter delivers an average power of 18dBm OFDM (64QAM, 54MBPS) signal with EVM of -28dB for G-mode application and 16dBm OFDM (64QAM, 54MBPS) signal with EVM of −28dB for A-mode application after digital pre-distortion.
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内置PA和数字预失真的CMOS收发器,适用于WLAN 802.11a/b/g/n应用
采用65nm CMOS技术实现2.4/5GHz全集成收发器。为了降低外部前端元件的成本,g模式射频收发(T/R)开关和一个低功耗的线性CMOS PA完全集成在片上。另一方面,为了更好的性能,片上只集成了a模式PA,而使用外部收发开关。在g模式和a模式接收器中分别显示5dB和5.5dB的NF。此外,在经过数字预失真处理后,发射机发送平均功率为18dBm的OFDM (64QAM, 54MBPS)信号,在g模式应用中EVM为-28dB,在a模式应用中发送平均功率为16dBm的OFDM (64QAM, 54MBPS)信号,EVM为-28dB。
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