{"title":"High-Voltage Silicon JFET for HV Multiplexing for the ATLAS MicroStrip Staves","authors":"G. Giacomini, Wei Chen, D. Lynn","doi":"10.22323/1.343.0030","DOIUrl":null,"url":null,"abstract":"We present a new kind of silicon device: a High-Voltage vertical JFET, originally conceived as a candidate for the High-Voltage Multiplexing switch in the ATLAS upgrade of the silicon microstrip Inner Tracker (ITk). The development of the geometry as well as of the technology process flow was carried out by the help of numerical simulations, which confirmed the feasibility of such a device. Using a planar process flow, both n-type and p-type HV-JFETs have been successfully fabricated in the silicon processing facility of Brookhaven National Laboratory, starting from epitaxial wafers which have been grown according to strict specifications. Probe station measurements of un-irradiated devices show low leakage current and high breakdown voltage (up to 600V) in the OFF state, and high currents in the ON state. These JFETs, thus, satisfy most of the specs required by the HV Multiplexing switch. However, only irradiation campaigns with protons and neutrons will assess their suitability as rad-hard switches.","PeriodicalId":400748,"journal":{"name":"Proceedings of Topical Workshop on Electronics for Particle Physics — PoS(TWEPP2018)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of Topical Workshop on Electronics for Particle Physics — PoS(TWEPP2018)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.22323/1.343.0030","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
We present a new kind of silicon device: a High-Voltage vertical JFET, originally conceived as a candidate for the High-Voltage Multiplexing switch in the ATLAS upgrade of the silicon microstrip Inner Tracker (ITk). The development of the geometry as well as of the technology process flow was carried out by the help of numerical simulations, which confirmed the feasibility of such a device. Using a planar process flow, both n-type and p-type HV-JFETs have been successfully fabricated in the silicon processing facility of Brookhaven National Laboratory, starting from epitaxial wafers which have been grown according to strict specifications. Probe station measurements of un-irradiated devices show low leakage current and high breakdown voltage (up to 600V) in the OFF state, and high currents in the ON state. These JFETs, thus, satisfy most of the specs required by the HV Multiplexing switch. However, only irradiation campaigns with protons and neutrons will assess their suitability as rad-hard switches.