{"title":"A high level synthesis tool for systolic designs","authors":"Pao-Po Hou, R. Owens, M. J. Irwin","doi":"10.1109/ARRAYS.1988.18103","DOIUrl":null,"url":null,"abstract":"The authors present DECOMPOSER, a high-level synthesis tool for automating the design of systolic systems. DECOMPOSER takes as inputs a hierarchical description of the computation to be performed and some hint as to how it is to be performed. The computation description is in the form of a parameterized DAG (directed acyclic graph) so that different problem sizes can be handled. The hit is in the form of marking information for that DAG. DECOMPOSER produces a detailed report on the hardware requirements for the specified computation. In particular, the structure of each computation node, how the computation nodes are connected, and the input and output sequences are given. The information is passed to other tools in the tool set so that ultimately a layout description file in suitable format (e.g. CIF) can be generated for the architecture performing the computation derived by DECOMPOSER.<<ETX>>","PeriodicalId":339807,"journal":{"name":"[1988] Proceedings. International Conference on Systolic Arrays","volume":"28 2 Suppl 4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1988-05-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"[1988] Proceedings. International Conference on Systolic Arrays","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ARRAYS.1988.18103","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
The authors present DECOMPOSER, a high-level synthesis tool for automating the design of systolic systems. DECOMPOSER takes as inputs a hierarchical description of the computation to be performed and some hint as to how it is to be performed. The computation description is in the form of a parameterized DAG (directed acyclic graph) so that different problem sizes can be handled. The hit is in the form of marking information for that DAG. DECOMPOSER produces a detailed report on the hardware requirements for the specified computation. In particular, the structure of each computation node, how the computation nodes are connected, and the input and output sequences are given. The information is passed to other tools in the tool set so that ultimately a layout description file in suitable format (e.g. CIF) can be generated for the architecture performing the computation derived by DECOMPOSER.<>
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