Highly Parallel Realization of Sparse Distributed Memory System

M. Linden, J. Saarinen, K. Kaski, P. Kanerva
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引用次数: 4

Abstract

A highly parallel realization of Kanerva 's Sparse Distributed Memory has been developed using advanced structures. The system consists of a host computer, address unit and memory unit. The address and memory units have been implemented with commercially available digital components to two functioning boards, and they perform the Hamming distance comparison and memory storage functions. In ordeT to achieve an effective hardware realization the units are designed for highly parallel processing. The host computer i s used to edit, compile, and down-load the programs to be run in the units. The software environment has been implemented under UNIX operating system, and the set of specific commands has been designed to support simulations. The system is intended for real-time applications. The performance estimations are also presented.
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稀疏分布式存储系统的高度并行实现
利用先进的结构,开发了Kanerva稀疏分布式存储器的高度并行实现。该系统由主机、地址单元和存储单元组成。地址和存储单元已经用商用数字元件实现到两个功能板上,它们执行汉明距离比较和内存存储功能。为了实现有效的硬件实现,设计了高度并行处理的单元。主机用于编辑、编译和下载要在单元中运行的程序。软件环境在UNIX操作系统下实现,并设计了支持仿真的特定命令集。该系统用于实时应用。并给出了性能评价。
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