GART: A graft algorithm to rebalance binary search trees on nonvolatile memories

Abstract

Recently, the rapid development and application of diversified embedded systems, such as cyber-physical systems (CPSes) and Internet-of-things (IoTs), is widely observed. Because embedded systems are often powered by batteries, the energy efficiency has become a key issue in system development. As a result, various energy-efficient nonvolatile memories, such as phase-change memory (PCM) or spin-torque-transfer random-access memory (STT-RAM), have become attractive choices for the storage of data and accompanying metadata (such as the index information of data) on embedded systems. However, a write operation takes much more (7X-10X) time and energy than a read operation does on many nonvolatile memories. This makes existing dictionary structures, e.g., the well-known red-black tree or B-tree, not preferred for metadata management nonvolatile memories. Although some efficient out-place update schemes such as partial Day-Stout-Warren (pDSW) algorithm have been proposed for tree rebalancing, they could result in serious fragmentation of space usage and garbage collection overheads. In this paper, we proposed a novel approach called Graft-based Algorithm for Tree Rebalancing (GART) to efficiently rebalance search trees with reduced garbage collection overheads. Just like the pDSW algorithm, although GART algorithm does not guarantee the worst-case height og the search tree, it provides an efficient means to ensure good memory access time on tree querying in most cases.