Variability-aware design of double gate FinFET-based current mirrors

Abstract

With the technology trend moving towards smaller geometries and improved circuit performances, multigate transistors are expected to replace the traditional bulk devices. The double-gate FinFET lends itself to a rich design space using various configurations of the two gates. Accurate current mirroring is a critical analog design requirement in many applications. Current mirror is an essential component in analog design for biasing and constant current generation. This paper presents the exploration of different configurations of a double gate fully depleted SOI based FinFETs for efficient design of current mirror designs. In particular, comparison among the important Figures-of-Merit (FoMs) current mirror designs including mismatch, variability, output resistance ($r_0$), compliance voltage ($V_{CV}$) is presented for: (1) shorted-gate (SG), (2) independent-gate (IG), and (3) low-power (LP) configurations. Based on the results obtained, guidelines are presented for the designer for current mirror design using FinFET.