A. Depari, P. Ferrari, A. Flammini, D. Marioli, E. Sisinni, A. Taroni
{"title":"IEEE1451 smart sensors supporting USB connectivity","authors":"A. Depari, P. Ferrari, A. Flammini, D. Marioli, E. Sisinni, A. Taroni","doi":"10.1109/SFICON.2004.1287156","DOIUrl":null,"url":null,"abstract":"This paper deals with smart sensors that offer data structures and access features as described in the IEEE1451 standard, while they have network interface based on USB. Communication protocol has been inspired by IEEE1451.2 transducer independent interface (TII). A new hardware architecture that fuses together a smart transducer interface module (STIM) and a USB Device, is introduced. A full VHDL description of the device has been also provided in order to facilitate future migration to a single-chip ASIC suitable for low-cost high-performance application. Finally, some preliminary simulations have been carried out to evaluate performances of the proposed U-STIM architecture.","PeriodicalId":381233,"journal":{"name":"ISA/IEEE Sensors for Industry Conference, 2004. Proceedings the","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-08-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"15","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"ISA/IEEE Sensors for Industry Conference, 2004. Proceedings the","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SFICON.2004.1287156","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 15
Abstract
This paper deals with smart sensors that offer data structures and access features as described in the IEEE1451 standard, while they have network interface based on USB. Communication protocol has been inspired by IEEE1451.2 transducer independent interface (TII). A new hardware architecture that fuses together a smart transducer interface module (STIM) and a USB Device, is introduced. A full VHDL description of the device has been also provided in order to facilitate future migration to a single-chip ASIC suitable for low-cost high-performance application. Finally, some preliminary simulations have been carried out to evaluate performances of the proposed U-STIM architecture.