Efficient Hardware Implementations for the Gaussian Normal Basis Multiplication Over GF(2163)

V. Trujillo-Olaya, Jaime Velasco-Medina, J. C. López-Hernández
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引用次数: 1

Abstract

This article presents efficient hardware implementations for the Gaussian normal basis multiplication over GF(2163). Hardware implementations of GF(2m) multiplication algorithms are suitable to design elliptic curve cryptoprocessors, which allow that elliptic curve based cryptosystems implemented in hardware provide more physical security and higher performance than software implementations. In this case, the multipliers were designed using conventional, modified and fast- parallel algorithms for the Gaussian normal basis multiplication, the synthesis and simulation were carried out using Quartus II of Altera, and the designs were synthesized on the device EP2A15B724C7. The simulation results show that the multipliers designed present a very good performance using small area.
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GF(2163)上高斯正态基乘法的高效硬件实现
本文给出了GF(2163)上高斯正态基乘法的有效硬件实现。GF(2m)乘法算法的硬件实现适合于椭圆曲线密码处理器的设计,这使得基于椭圆曲线的密码系统在硬件上实现比软件实现具有更高的物理安全性和更高的性能。在这种情况下,采用常规、改进和快速并行算法设计了高斯正态基乘法乘法器,使用Altera公司的Quartus II进行了合成和仿真,并在器件EP2A15B724C7上进行了合成。仿真结果表明,所设计的乘法器在小面积下具有很好的性能。
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