1.8GHz 3rd order lowpass filter with programmable gain in 180nm CMOS

S. Abbasi, A. Shabra
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Abstract

A LC ladder based lowpass filter and programmable gain amplifier is presented for the baseband section of a mm-wave wireless receiver. The filter design combines buffering, filtering and termination in a single stage. Implemented in 180nm CMOS and occupying 0.36mm^2 area, it's measured lowest and highest gain settings are 5.6 and 21.6dB, with corner frequency of 2.3GHz and 1.76GHz, IIP3 of 13.9 and -3.9dB, and a power consumption of 19mW and 31mW respectively. The input referred noise density is 2.32 and 2.9 nVrms/rHz for the highest and lowest gain settings.
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180nm CMOS可编程增益1.8GHz三阶低通滤波器
针对毫米波无线接收机的基带部分,提出了一种基于LC阶梯的低通滤波器和可编程增益放大器。该滤波器的设计将缓冲、滤波和终止结合在一个单级中。在180nm CMOS上实现,占地0.36mm^2,测得最低和最高增益设置分别为5.6和21.6dB,角频分别为2.3GHz和1.76GHz, IIP3分别为13.9和-3.9dB,功耗分别为19mW和31mW。在最高和最低增益设置下,输入参考噪声密度分别为2.32和2.9 nVrms/rHz。
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