Fast convergence and linear modeling of adaptive cascaded delayed signal cancellation-PLL

Yingpin Wang, Yunxiang Xie, Zhiwu Zeng, Xiaoyu Zhang, Lanfang Li, Xiaogang Xu
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引用次数: 3

Abstract

Currently, delayed signal cancellation (DSC) is the most popular and widely used technology owing to its robust performance and effectiveness, however, there are time delay in transient response. This paper proposed a method to choose delay factors of cascaded delayed signal cancellation-PLL (CDSC-PLL), which fast convergence and can extract fundamental frequency positive sequence(FFPS) in diode rectifier exactly. Frequency adaptive DSC operator can well adapt the grid frequency variations, however, increases the complexity and hard to establish its transfer function. This paper established the linear function of frequency adaptive CDSC-PLL in small signal method, and design the parameters of control system. Verify the correction of the linear model by MATLAB/Simulink and experiment. Also compare the performances with original schemes. The results shown that the small signal model is correct and the system performance is preferable in chosen parameters.
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自适应级联延迟信号消除锁相环的快速收敛和线性建模
延迟信号抵消技术(DSC)以其鲁棒性和有效性成为目前应用最为广泛的一种技术,但在瞬态响应中存在时间延迟。提出了一种级联延迟信号消除锁相环(CDSC-PLL)延迟因子的选择方法,该方法收敛速度快,能够准确提取二极管整流器的基频正序列。频率自适应DSC算子能很好地适应电网频率变化,但增加了其复杂性和传递函数的建立难度。本文用小信号法建立了频率自适应CDSC-PLL的线性函数,并设计了控制系统的参数。通过MATLAB/Simulink和实验验证了线性模型的正确性。并与原方案进行了性能比较。结果表明,所建立的小信号模型是正确的,在选取的参数下,系统性能较好。
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