V. Ferlet-Cavrois, P. Paillet, O. Musseau, J. Leray, O. Faynot, C. Raynaud, J. Pelloie
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引用次数: 10
Abstract
The DTMOS architecture is particularly suited to very low supply voltage applications (0.6-1V). This paper presents DTMOS devices processed with a partially depleted 0.25 /spl mu/m SOI technology. It analyses their electrical behavior under total dose irradiation.
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