Fault tolerant Four-State Logic by using Self-Healing Cells

Abstract

The trend towards higher integration and faster operating speed leads to decreasing feature sizes and lower supply voltages in modern integrated circuits. These properties make the circuits more error-prone, requiring a fault tolerant implementation for applications demanding high reliability, e.g. space missions. In previous work we presented a concept how to obtain fault tolerant digital circuits by using asynchronous four-state logic (FSL). This type of logic already exhibits a high degree of fault tolerance where most faults simply halt the circuit (deadlock). The remaining types of faults are handled by temporal redundancy. Adding a deadlock detection unit and introducing the concept of self-healing cells (SHCs) leads to a highly reliable circuit that is able to tolerate even multiple faults. However our experiments revealed that some specific fault constellations neither cause a deadlock nor are they detected by a redundant calculation. We present two improved ways of error detection, which allow to capture even these types of faults. Further, a comparison between the size of an SHC and the achieved fault tolerance wrt. multiple faults is performed.