Thermo-mechanical reliability analysis of flip-chip bonded silicon carbide Schottky diodes

S. Seal, Andrea K. Wallace, John E. Zumbro, H. Mantooth
{"title":"Thermo-mechanical reliability analysis of flip-chip bonded silicon carbide Schottky diodes","authors":"S. Seal, Andrea K. Wallace, John E. Zumbro, H. Mantooth","doi":"10.1109/IWIPP.2017.7936756","DOIUrl":null,"url":null,"abstract":"This paper presents the thermo-mechanical reliability analysis of a novel chip-scale wire bondless packaging technique for a SiC Schottky diode that leads to lower parasitics, higher reliability, lower costs, and lower losses. The proposed approach uses a flip-chip solder ball array to make connections to the anode. A copper connector was used to make contact with the bottom cathode, thus reconfiguring the bare die into a chip-scale, flip-chip capable device. Thermo-mechanical analysis in a finite element software showed that the proposed approach could better manage Coefficient of Thermal Expansion (CTE) mismatch stresses arising at the critical module interfaces as compared with a conventional wire bonded module. A detailed analysis of the flip-chip structure is presented and contrasted with a state-of-the-art wire bonded module. Different design parameters were explored for the drain connector to be able to make an optimized decision. However, keeping production costs low was prioritized without compromising significant performance. The fabrication process for manufacturing a flip-chip schottky diode module was also demonstrated along with preliminary test results to demonstrate functionality.","PeriodicalId":164552,"journal":{"name":"2017 IEEE International Workshop On Integrated Power Packaging (IWIPP)","volume":"73 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 IEEE International Workshop On Integrated Power Packaging (IWIPP)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IWIPP.2017.7936756","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4

Abstract

This paper presents the thermo-mechanical reliability analysis of a novel chip-scale wire bondless packaging technique for a SiC Schottky diode that leads to lower parasitics, higher reliability, lower costs, and lower losses. The proposed approach uses a flip-chip solder ball array to make connections to the anode. A copper connector was used to make contact with the bottom cathode, thus reconfiguring the bare die into a chip-scale, flip-chip capable device. Thermo-mechanical analysis in a finite element software showed that the proposed approach could better manage Coefficient of Thermal Expansion (CTE) mismatch stresses arising at the critical module interfaces as compared with a conventional wire bonded module. A detailed analysis of the flip-chip structure is presented and contrasted with a state-of-the-art wire bonded module. Different design parameters were explored for the drain connector to be able to make an optimized decision. However, keeping production costs low was prioritized without compromising significant performance. The fabrication process for manufacturing a flip-chip schottky diode module was also demonstrated along with preliminary test results to demonstrate functionality.
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
倒装键合碳化硅肖特基二极管热机械可靠性分析
本文介绍了一种新型芯片级SiC肖特基二极管无焊线封装技术的热机械可靠性分析,该技术具有低寄生、高可靠性、低成本和低损耗的特点。所提出的方法使用倒装芯片焊接球阵列与阳极连接。铜连接器用于与底部阴极接触,从而将裸晶片重新配置为芯片级、可倒装芯片的器件。有限元软件热力学分析表明,与传统的线键合模块相比,该方法可以更好地控制关键模块界面处产生的热膨胀系数(CTE)失配应力。对倒装芯片结构进行了详细的分析,并与最先进的线键模块进行了对比。研究了泄油接头的不同设计参数,以便做出优化决策。然而,在不影响显著性能的情况下,保持低生产成本是优先考虑的。还演示了制造倒装肖特基二极管模块的制造过程以及初步测试结果,以演示功能。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
Improved high-temperature dielectric property of epoxy resin composites with nano- and micro-sized magnesia fillers Advanced double sided cooling IGBT module and power control unit development Suppression of electromagnetic interference using screening and shielding techniques within the switching cells High frequency high voltage generation with air-core transformer Design and construction of a co-planar power bus interconnect for low inductance switching
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1