Architectural approaches to reducing power related system costs

S. Gunther
{"title":"Architectural approaches to reducing power related system costs","authors":"S. Gunther","doi":"10.1109/EPEP.2001.967598","DOIUrl":null,"url":null,"abstract":"The power dissipation of modern processors is steadily increasing, keeping pace with growing transistor counts and increasing clock frequencies. In an effort to counteract this trend, integrated circuit designers are aggressively employing design optimizations to minimize circuit power consumption. Power reduction was a key focus of the Intel Pentium 4 processor design team, and the design team focused from the beginning on reducing power consumption without compromising other design targets. Many techniques, both innovative and pre-existing, were applied across all functional units in the processor in an effort to eliminate unnecessary power consumption. The mass adoption of these techniques resulted in a significant reduction in both maximum and typical processor power dissipation.","PeriodicalId":174339,"journal":{"name":"IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565)","volume":"214 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2001-10-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EPEP.2001.967598","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3

Abstract

The power dissipation of modern processors is steadily increasing, keeping pace with growing transistor counts and increasing clock frequencies. In an effort to counteract this trend, integrated circuit designers are aggressively employing design optimizations to minimize circuit power consumption. Power reduction was a key focus of the Intel Pentium 4 processor design team, and the design team focused from the beginning on reducing power consumption without compromising other design targets. Many techniques, both innovative and pre-existing, were applied across all functional units in the processor in an effort to eliminate unnecessary power consumption. The mass adoption of these techniques resulted in a significant reduction in both maximum and typical processor power dissipation.
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
降低电力相关系统成本的架构方法
随着晶体管数量的增加和时钟频率的增加,现代处理器的功耗正在稳步增加。为了对抗这一趋势,集成电路设计人员正在积极地采用设计优化来最小化电路功耗。降低功耗是英特尔Pentium 4处理器设计团队的一个重点,设计团队从一开始就专注于在不影响其他设计目标的情况下降低功耗。许多技术,既有创新的,也有已有的,被应用于处理器的所有功能单元,以努力消除不必要的功耗。这些技术的大量采用大大降低了最大和典型处理器功耗。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
Model extraction and waveform correlation via a generalized frequency- and time-domain optimizer Analysis of power/ground planes by PCB simulator with model order reduction technique Measuring radiation of small electronic equipment in three-dimensional TEM cells Generalized PEEC models for three-dimensional interconnect structures and integrated passives of arbitrary shapes Equivalent circuit representation and dimension reduction technique for efficient FDTD modeling of power/ground plane
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1