{"title":"Optimization of complementary power DMOSFETs for low-voltage high-frequency DC-DC conversion","authors":"R.K. Williams, R. Blattner, B. Mohandes","doi":"10.1109/APEC.1995.469106","DOIUrl":null,"url":null,"abstract":"This paper describes the trade-offs among conduction, gate drive, output capacitance, and crossover losses for complementary power DMOSFETs used in switchmode DC-to-DC converters. These are evaluated as a function of normalized die size and 11 technology related parameters. DMOSFET size optimization for a 1-MHz complementary synchronous buck converter (V/sub out/=2.7 V) and boost converter (V/sub out/=6 V) is detailed for single-cell lithium ion battery applications in the 100 mA to 1 A range of load current.<<ETX>>","PeriodicalId":335367,"journal":{"name":"Proceedings of 1995 IEEE Applied Power Electronics Conference and Exposition - APEC'95","volume":"52 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1995-03-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"12","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of 1995 IEEE Applied Power Electronics Conference and Exposition - APEC'95","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APEC.1995.469106","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 12
Abstract
This paper describes the trade-offs among conduction, gate drive, output capacitance, and crossover losses for complementary power DMOSFETs used in switchmode DC-to-DC converters. These are evaluated as a function of normalized die size and 11 technology related parameters. DMOSFET size optimization for a 1-MHz complementary synchronous buck converter (V/sub out/=2.7 V) and boost converter (V/sub out/=6 V) is detailed for single-cell lithium ion battery applications in the 100 mA to 1 A range of load current.<>
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