Hardware-Software Codesign of a Fingerprint Alignment Processor

M. Fons, F. Fons, E. Cantó
{"title":"Hardware-Software Codesign of a Fingerprint Alignment Processor","authors":"M. Fons, F. Fons, E. Cantó","doi":"10.1109/MIXDES.2007.4286246","DOIUrl":null,"url":null,"abstract":"Within the biometrics field, the development of an automatic personal authentication system is nowadays an open research problem. Most of the difficulties rely on the complexity and the computational power needed to implement an algorithm reliable enough to guarantee the validity of the recognition system even when only low-quality biometric information is available from the users. Apart from the inherent complexity of the biometric algorithm, there exist many additional requirements for the application: high-security level, real-time characteristics and low-cost. All these factors originate a technical challenge. A compromise between the final application performance and the amount of resources needed to implement the system exists. Following this direction, the design of a fingerprint alignment processor developed by means of hardware-software codesign techniques is presented in this paper. The performance achieved with this processor is compared against the performance reached with an only software-oriented solution. The acceleration factor achieved by the hardware proves the feasibility of real-time applications, which is not guaranteed when developing the same algorithm under purely-software platforms.","PeriodicalId":310187,"journal":{"name":"2007 14th International Conference on Mixed Design of Integrated Circuits and Systems","volume":"93 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-06-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 14th International Conference on Mixed Design of Integrated Circuits and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MIXDES.2007.4286246","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

Abstract

Within the biometrics field, the development of an automatic personal authentication system is nowadays an open research problem. Most of the difficulties rely on the complexity and the computational power needed to implement an algorithm reliable enough to guarantee the validity of the recognition system even when only low-quality biometric information is available from the users. Apart from the inherent complexity of the biometric algorithm, there exist many additional requirements for the application: high-security level, real-time characteristics and low-cost. All these factors originate a technical challenge. A compromise between the final application performance and the amount of resources needed to implement the system exists. Following this direction, the design of a fingerprint alignment processor developed by means of hardware-software codesign techniques is presented in this paper. The performance achieved with this processor is compared against the performance reached with an only software-oriented solution. The acceleration factor achieved by the hardware proves the feasibility of real-time applications, which is not guaranteed when developing the same algorithm under purely-software platforms.
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指纹定位处理器的软硬件协同设计
在生物识别领域,开发自动身份认证系统是目前一个开放性的研究课题。大多数困难依赖于实现足够可靠的算法所需的复杂性和计算能力,即使只有来自用户的低质量生物特征信息也能保证识别系统的有效性。除了生物识别算法固有的复杂性外,还存在许多额外的应用要求:高安全性、实时性和低成本。所有这些因素都是技术挑战的根源。最终的应用程序性能和实现系统所需的资源量之间存在折衷。在此基础上,本文采用软硬件协同设计技术开发了一种指纹定位处理器。将此处理器所达到的性能与仅面向软件的解决方案所达到的性能进行比较。硬件实现的加速系数证明了实时应用的可行性,而在纯软件平台上开发相同的算法时,这一点得不到保证。
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