Current-mode threshold logic gates

Abstract

In this paper, we present low-power and high-performance logic gates called the current-mode threshold logic (CMTL) gates. Low-power dissipation is achieved by limiting the voltage swing on the interconnects and the internal nodes of the CMTL gates. High-performance is achieved by the use of transistor configurations that sense a small difference in current and set the differential outputs to the correct values. The realization of NAND, NOR, AND, OR logic gates and other logic functions using the CMTL gates is presented. We also present several implementations of CMTL gates and describe the relative advantages and limitations of these implementations. SPICE simulation, results for a 1.5 V 0.18 u CMOS technology are also presented for the different circuit configurations described in the paper.