Full band UWB LNA with 8kV+ ESD protection in RFCMOS

Xin Wang, S. Fan, B. Qin, Jian Liu, Lin Lin, He Tang, H Zhao, Q. Fang, Albert Z. H. Wang, J. He, B. Zhao, R. Wong, Shi-Jie Wen
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引用次数: 1

Abstract

This paper reports a single-chip full-band 3.1–10.6GHz ESD UWB LNA featuring cascode shunt-series feedback topology and very robust whole-chip ESD protection. Careful ESD+LNA co-design was excised to achieve full-chip circuit optimization with high ESD protection. This design is implemented in a foundry 0.18µm RFCMOS process. Measurement shows the highest reported ESD protection of 8.25kV, a peak gain of 10.9dB, a good gain flatness of 3.64%/GHz across 3.1–10.6GHz, low input reflection of <−10dB, noise figure of 4.98dB, group delay of 103±35pS and good linearity with P1-dB=2.88dBm@7GHz.
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RFCMOS中具有8kV+ ESD保护的全频带UWB LNA
本文报道了一种单片全频带3.1-10.6GHz ESD UWB LNA,具有级码并联串联反馈拓扑和非常鲁棒的全片ESD保护。通过仔细的ESD+LNA协同设计,实现了具有高ESD保护的全芯片电路优化。本设计是在铸造0.18µm RFCMOS工艺中实现的。测量结果表明,最高ESD保护为8.25kV,峰值增益为10.9dB,在3.1-10.6GHz范围内的增益平坦度为3.64%/GHz,低输入反射为<−10dB,噪声系数为4.98dB,群延迟为103±35pS,线性度为P1-dB=2.88dBm@7GHz。
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