Xin Wang, S. Fan, B. Qin, Jian Liu, Lin Lin, He Tang, H Zhao, Q. Fang, Albert Z. H. Wang, J. He, B. Zhao, R. Wong, Shi-Jie Wen
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引用次数: 1
Abstract
This paper reports a single-chip full-band 3.1–10.6GHz ESD UWB LNA featuring cascode shunt-series feedback topology and very robust whole-chip ESD protection. Careful ESD+LNA co-design was excised to achieve full-chip circuit optimization with high ESD protection. This design is implemented in a foundry 0.18µm RFCMOS process. Measurement shows the highest reported ESD protection of 8.25kV, a peak gain of 10.9dB, a good gain flatness of 3.64%/GHz across 3.1–10.6GHz, low input reflection of <−10dB, noise figure of 4.98dB, group delay of 103±35pS and good linearity with P1-dB=2.88dBm@7GHz.