Hao Guo, Youming Zhang, Xusheng Tang, Junjie Li, F. Huang, N. Jiang
{"title":"Design of CMOS Bandwidth Tunable Low-Pass Filter","authors":"Hao Guo, Youming Zhang, Xusheng Tang, Junjie Li, F. Huang, N. Jiang","doi":"10.1109/ICICM50929.2020.9292272","DOIUrl":null,"url":null,"abstract":"In this paper, a fully integrated bandwidth tunable low-pass filter based on 0.13\\ \\mu \\mathrm{m}$ CMOS technology is proposed. Active-RC structure is selected as the basic filtering unit. In order to achieve better suppression characteristics, 3-stage Sallen-Key second-order low-pass filter units are adopted as cascading. The filter tunable by 15 steps from 4 to 60 MHz in steps of 4 MHz. The double cutoff frequency suppression is greater than 30dB and the IIP3 is 14.2dBm. The power supply voltage used for this chip is 1.2V with occupying 0.2 mm2 area.","PeriodicalId":364285,"journal":{"name":"2020 IEEE 5th International Conference on Integrated Circuits and Microsystems (ICICM)","volume":"33 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-10-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE 5th International Conference on Integrated Circuits and Microsystems (ICICM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICICM50929.2020.9292272","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
In this paper, a fully integrated bandwidth tunable low-pass filter based on 0.13\ \mu \mathrm{m}$ CMOS technology is proposed. Active-RC structure is selected as the basic filtering unit. In order to achieve better suppression characteristics, 3-stage Sallen-Key second-order low-pass filter units are adopted as cascading. The filter tunable by 15 steps from 4 to 60 MHz in steps of 4 MHz. The double cutoff frequency suppression is greater than 30dB and the IIP3 is 14.2dBm. The power supply voltage used for this chip is 1.2V with occupying 0.2 mm2 area.