{"title":"A radiation hardened SRAM cell-DSRL","authors":"Shuxiao Wu, Lei Li, Lei Ren","doi":"10.1109/ICAM.2016.7813607","DOIUrl":null,"url":null,"abstract":"The reliability of SRAM used in space radiation environment is seriously decreased by single event upset (SEU) and single event transient (SET), which poses a great threat to the normal operation of aerospace equipment. In this paper, we propose a novel structure Delay Self Restoring Logic (DSRL) based on SRL. Its storage structure makes up of three Muller C-elements and two phase inverters. It separates read and write lines on the basis of structure and adds delay unit and delayed bit line to write data. This new memory cell has got the ability to immunize SET in all working period besides anti-SEU. The simulation results show that our proposed SRAM cell has a considerable lower failure probability among the considered recent radiation hardened SRAM cells.","PeriodicalId":179100,"journal":{"name":"2016 International Conference on Integrated Circuits and Microsystems (ICICM)","volume":"107 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 International Conference on Integrated Circuits and Microsystems (ICICM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICAM.2016.7813607","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
The reliability of SRAM used in space radiation environment is seriously decreased by single event upset (SEU) and single event transient (SET), which poses a great threat to the normal operation of aerospace equipment. In this paper, we propose a novel structure Delay Self Restoring Logic (DSRL) based on SRL. Its storage structure makes up of three Muller C-elements and two phase inverters. It separates read and write lines on the basis of structure and adds delay unit and delayed bit line to write data. This new memory cell has got the ability to immunize SET in all working period besides anti-SEU. The simulation results show that our proposed SRAM cell has a considerable lower failure probability among the considered recent radiation hardened SRAM cells.