Lowering the T-depth of Quantum Circuits via Logic Network Optimization

Thomas Häner, Mathias Soeken
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引用次数: 3

Abstract

The multiplicative depth of a logic network over the gate basis {∧ , ⊕ , ¬} is the largest number of ∧ gates on any path from a primary input to a primary output in the network. We describe a dynamic programming based logic synthesis algorithm to reduce the multiplicative depth of logic networks. It makes use of cut enumeration, tree balancing, and exclusive sum-of-products (ESOP) representations. Our algorithm has applications to cryptography and quantum computing, as a reduction in the multiplicative depth directly translates to a lower T-depth of the corresponding quantum circuit. Our experimental results show improvements in T-depth over state-of-the-art methods and over several hand-optimized quantum circuits, for instance, of AES, SHA, and floating-point arithmetic.
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通过逻辑网络优化降低量子电路的t -深度
逻辑网络在栅极基{∧,⊕,¬}上的乘法深度是网络中从主输入到主输出的任意路径上的最大∧栅极数。提出了一种基于动态规划的逻辑综合算法,以减小逻辑网络的乘法深度。它利用切枚举、树平衡和排他乘积和(ESOP)表示。我们的算法可以应用于密码学和量子计算,因为乘法深度的减少直接转化为相应量子电路的较低t深度。我们的实验结果表明,与最先进的方法和几种手动优化的量子电路(例如AES、SHA和浮点算法)相比,T-depth有所改进。
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