AGRADECIMENTOS

Abstract

Image rectification is the process in which two images of the same scene are transformed so that they are parallel to the x-axis. The work developed by (Cambuim et al. , 2019) includes two implementations of a stereo matching system to calculate a disparity map that represents the distances of image points that form objects in the 3D environment. One of the systems was implemented in C++ and the other one in System Verilog and prototyped in an FPGA on the Intel DE2i-150 board. These systems relied on the use of the OpenCV library, but since there is no FPGA rectification implementation in the library, the board used should always be connected to a computer to receive the rectified images as input. In this work, an image rectification module was implemented at the RTL level and described in the hardware description language System Verilog. This module can be integrated with the system implemented by Lucas Cambuim prototyped in FPGA. The architecture was developed for the hardware module, and the pipeline technique was used to reduce the total rectification processing time. The validation of the module showed that it was correctly implemented when compared to the reference model developed in a high-level language. Analysis of hardware resource usage reported that the module used quantities within limits available on the DE2i-150 board. The clock frequency of about 100 MHz and the execution time of 6 ms guarantee the execution of this module in real-time.