nVHDL: A Hardware Design Language for Modeling Discrete and Analog Design and Simulation of Mixed-Signal Electronic Systems (Tutorial Abstract)

Sumit Ghosh
{"title":"nVHDL: A Hardware Design Language for Modeling Discrete and Analog Design and Simulation of Mixed-Signal Electronic Systems (Tutorial Abstract)","authors":"Sumit Ghosh","doi":"10.1109/ISQED.2002.10010","DOIUrl":null,"url":null,"abstract":"The tutorial will focus on the fundamental principles and concepts that underlie every hardware description language invented to-date. It will begin with a quick survey of the classical HDLs for digital systems, discuss Verilog, and then focus heavily on VHDL. HDLs for analog systems such as VHDL-AMS and their basic weaknesses, starting from the fundamental requirements of mixed-signal electronic designs will be examined. Next, the tutorial will concentrate, through meaningful and real-world examples, on how to accurately model hardware so as to get reliable results from HDL simulations. The issues of concurrent simulation of VHDL models on parallel processors and new transport delay semantics that will enable the modeling of PCI and other sophisticated buses based on electromagnetic reflections will be addressed. Finally, in the tutorial, the present problems with VHDL will be examined and current research in “mixed signal” modeling and simulation, that may constitute the basis for a future evolution in HDL technology, namely nVHDL will be reviewed. Time permitting, the tutorial will also explain how to design HDL simulators.","PeriodicalId":302936,"journal":{"name":"IEEE International Symposium on Quality Electronic Design","volume":"94 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE International Symposium on Quality Electronic Design","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISQED.2002.10010","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
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Abstract

The tutorial will focus on the fundamental principles and concepts that underlie every hardware description language invented to-date. It will begin with a quick survey of the classical HDLs for digital systems, discuss Verilog, and then focus heavily on VHDL. HDLs for analog systems such as VHDL-AMS and their basic weaknesses, starting from the fundamental requirements of mixed-signal electronic designs will be examined. Next, the tutorial will concentrate, through meaningful and real-world examples, on how to accurately model hardware so as to get reliable results from HDL simulations. The issues of concurrent simulation of VHDL models on parallel processors and new transport delay semantics that will enable the modeling of PCI and other sophisticated buses based on electromagnetic reflections will be addressed. Finally, in the tutorial, the present problems with VHDL will be examined and current research in “mixed signal” modeling and simulation, that may constitute the basis for a future evolution in HDL technology, namely nVHDL will be reviewed. Time permitting, the tutorial will also explain how to design HDL simulators.
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nVHDL:一种用于混合信号电子系统离散和模拟建模和仿真的硬件设计语言(教程摘要)
本教程将重点介绍迄今为止发明的每种硬件描述语言的基本原则和概念。它将从数字系统的经典hdl的快速调查开始,讨论Verilog,然后重点关注VHDL。本文将从混合信号电子设计的基本要求出发,探讨VHDL-AMS等模拟系统的高分辨率及其基本弱点。接下来,本教程将通过有意义的和现实世界的例子,集中讨论如何准确地对硬件进行建模,以便从HDL仿真中获得可靠的结果。将讨论并行处理器上VHDL模型的并发仿真问题,以及新的传输延迟语义,该语义将使PCI和其他基于电磁反射的复杂总线建模成为可能。最后,在本教程中,将审查VHDL目前存在的问题,以及目前在“混合信号”建模和仿真方面的研究,这可能构成HDL技术未来发展的基础,即nVHDL将被回顾。如果时间允许,本教程还将解释如何设计HDL模拟器。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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