A real-time VLSI architecture for direct kinematics

Abstract

A real-time direct kinematics algorithm has been implemented on a general-purpose signal processor. The implementation features fixed-point calculation and on-chip generation of sinusoidal functions. It is based on a parallel, pipelined architecture including a 16*16 multiplier and two 36-bit accumulators. Various algorithms are used for sinusoidal computations to trade off speed against memory usage. The algorithms have been both simulated and run on the actual hardware. The results indicate that the direct kinematics solution is obtained in under 10 microseconds with a 16-bit resolution. This amounts to a speed improvement of three orders of magnitude compared to execution on a conventional 16-bit microprocessor.