Design and analysis of improved performance ring VCO based on differential pair configuration

Abstract

Voltage controlled oscillators (VCOs) are the most important basic building block of wired or wireless communication systems where these are mostly used as high frequency clock generating subsystems. The main objective of this paper is to design a high frequency VCO with a good phase noise performance and low power consumption. This paper presents an improved performance CMOS voltage controlled ring oscillator which is based on single ended differential pair configuration. The performance parameters of VCO like frequency, tuning range and power dissipation are also analyzed here. The proposed single ended ring VCO is implemented using 180 nm CMOS technology and 3.5 V power supply. It provides a wide tuning range from 5.2996 GHz to 6.567 GHz at 0.5 V to 2.5 V control voltage variation with 2.921 mW to 6.806 mW power consumption. The simulation results satisfies basic concept of VCO in which oscillation frequency linearly varies with supply voltage. The implemented design has high oscillation frequency, and also consumes less area as compared to existing current starved ring VCO.