S. H. Wood, J.C. Marr, T.T. Nguyen, D. J. Padgett, J.C. Tran, T. Griswold, D.C. Lebowitz
{"title":"Read disturb errors in a CMOS static RAM chip","authors":"S. H. Wood, J.C. Marr, T.T. Nguyen, D. J. Padgett, J.C. Tran, T. Griswold, D.C. Lebowitz","doi":"10.1109/AERO.1989.82424","DOIUrl":null,"url":null,"abstract":"The authors describe an extensive investigation into pattern-sensitive soft errors (read disturb errors) in the TCC244 CMOS static RAM chip. The TCC244, also known as the SA2838, is a radiation-hard, single-event-upset (SEU)-resistant 4 by 256 memory chip. This device is being used by NASA's Jet Propulsion Laboratory in the Galileo and Magellan spacecraft, which will have encounters with Jupiter and Venus, respectively. Two aspects of the part's design are shown to result in the occurrence of read disturb errors: the transparence of the signal path from the address pins to the array of cells, and the large resistance in the Vdd and Vss lines of the cells in the center of the array. Probe measurements taken during a read disturb failure illustrate how address skews and the data pattern in the chip combine to produce a bit flip. A capacitive charge pump formed by the individual cell capacitances and the resistance in the supply lines pumps down both the internal cell voltage and the local supply voltage until a bit flip occurs.<<ETX>>","PeriodicalId":414116,"journal":{"name":"IEEE Aerospace Applications Conference","volume":"134 Supplement_1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1989-02-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Aerospace Applications Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/AERO.1989.82424","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
The authors describe an extensive investigation into pattern-sensitive soft errors (read disturb errors) in the TCC244 CMOS static RAM chip. The TCC244, also known as the SA2838, is a radiation-hard, single-event-upset (SEU)-resistant 4 by 256 memory chip. This device is being used by NASA's Jet Propulsion Laboratory in the Galileo and Magellan spacecraft, which will have encounters with Jupiter and Venus, respectively. Two aspects of the part's design are shown to result in the occurrence of read disturb errors: the transparence of the signal path from the address pins to the array of cells, and the large resistance in the Vdd and Vss lines of the cells in the center of the array. Probe measurements taken during a read disturb failure illustrate how address skews and the data pattern in the chip combine to produce a bit flip. A capacitive charge pump formed by the individual cell capacitances and the resistance in the supply lines pumps down both the internal cell voltage and the local supply voltage until a bit flip occurs.<>