A hardware-oriented IME algorithm and its implementation for HEVC

Xin Ye, Dandan Ding, Lu Yu
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引用次数: 15

Abstract

The flexible coding structure in High Efficiency Video Coding (HEVC) introduces many challenges to real-time implementation of the integer-pel motion estimation (IME). In this paper, a hardware-oriented IME algorithm naming parallel clustering tree search (PCTS) is proposed, where various prediction units (PU) are processed simultaneously with a parallel scheme. The PCTS consists of four hierarchical search steps. After each search step, PUs with the same MV candidate are clustered to one group. And the next search step is shared by PUs in the same group. Owing to the top-down tree-structure search strategy of the PCTS, search processes are highly shared among different PUs and system throughput is thus significantly increased. As a result, the hardware implementation based on the proposed algorithm can support real-time video applications of QFHD (3840×2160) at 30fps.
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一种面向硬件的HEVC IME算法及其实现
高效视频编码(HEVC)中灵活的编码结构给整点运动估计(IME)的实时实现带来了许多挑战。提出了一种面向硬件的并行聚类树搜索算法(PCTS),该算法以并行方式同时处理多个预测单元(PU)。PCTS由四个层次搜索步骤组成。在每个搜索步骤之后,具有相同候选MV的pu聚类到一组。下一个搜索步骤由同一组中的pu共享。由于PCTS采用自顶向下的树状结构搜索策略,搜索过程在不同的pu之间高度共享,从而显著提高了系统吞吐量。结果表明,基于该算法的硬件实现可以支持30fps的QFHD (3840×2160)实时视频应用。
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