SM6: A 16nm System-on-Chip for Accurate and Noise-Robust Attention-Based NLP Applications : The 33rd Hot Chips Symposium – August 22-24, 2021

Thierry Tambe, En-Yu Yang, Glenn G. Ko, Yuji Chai, Coleman Hooper, M. Donato, P. Whatmough, Alexander M. Rush, D. Brooks, Gu-Yeon Wei
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引用次数: 1

Abstract

In this work, we present SM6, an SoC architecture for real-time denoised speech and NLP pipelines, featuring (1) MSSE: an unsupervised probabilistic sound source separation accelerator, (2) FlexNLP: a programmable inference accelerator for attention-based seq2seq DNNs using adaptive floating-point datatypes for wide dynamic range computations, (3) a dual-core Arm Cortex A53 CPU cluster, which provides on-demand SIMD FFT processing, and operating system support. In adverse acoustic conditions, MSSE allows FlexNLP to store up to 6x smaller ASR models obviating the very inefficient strategy of scaling up the DNN model to achieve noise robustness. MSSE and FlexNLP produce efficiency ranges of 4.33-17.6 Gsamples/s/W and 2.6-7.8TFLOPs/W, respectively, with per-frame end-to-end latencies of 15-45ms.
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SM6:用于精确和噪声鲁棒的基于注意力的NLP应用的16nm片上系统:第33届热芯片研讨会(2021年8月22-24日
在这项工作中,我们提出了SM6,一种用于实时去噪语音和NLP管道的SoC架构,具有(1)MSSE:一种无监督的概率声源分离加速器,(2)FlexNLP:一种可编程推理加速器,用于基于注意力的seq2seq dnn,使用自适应浮点数据类型进行宽动态范围计算,(3)双核Arm Cortex A53 CPU集群,提供按需SIMD FFT处理和操作系统支持。在不利的声学条件下,MSSE允许FlexNLP存储多达6倍较小的ASR模型,避免了放大DNN模型以实现噪声鲁棒性的非常低效的策略。MSSE和FlexNLP的效率范围分别为4.33-17.6 Gsamples/s/W和2.6-7.8TFLOPs/W,每帧端到端延迟为15-45ms。
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