Design of Hysteresis Comparator with Wide Common Mode Operating Range

Yuhao Yao, Mei Jiang
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Abstract

In order to improve the ability of hysteresis comparators to suppress noise and interference signals and expand their common mode operating range, an improved hysteresis comparator circuit is proposed based on the analysis of the relationship between input common mode range, the tail current and the flip voltage, utilizing the common mode signal to realize adaptive bias of tail current transistor. Using SMIC 0.18$\mu$m 1P6M CMOS technology, the simulation results show that when supply voltage is 1.8V, 2.2V and 2.8V respectively, the proposed hysteresis comparator can work normally under the input common mode voltage changes from 0 to 1.5V at five process corners (TT, SS, FF, FS and SF).
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宽共模工作范围磁滞比较器的设计
为了提高迟滞比较器抑制噪声和干扰信号的能力,扩大其共模工作范围,在分析输入共模范围、尾电流和翻转电压关系的基础上,提出了一种改进的迟滞比较器电路,利用共模信号实现尾电流晶体管的自适应偏置。采用中芯国际0.18$\mu$m 1P6M CMOS技术,仿真结果表明,当电源电压分别为1.8V、2.2V和2.8V时,在TT、SS、FF、FS和SF五个工艺角输入共模电压从0到1.5V变化的情况下,所设计的迟滞比较器能够正常工作。
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