A 5 volt drive output buffer in a 3 volt technology

B. L. Morris
{"title":"A 5 volt drive output buffer in a 3 volt technology","authors":"B. L. Morris","doi":"10.1109/ASIC.1997.617020","DOIUrl":null,"url":null,"abstract":"This paper describes an output buffer which is capable of producing a 5 volt output voltage in a 3 volt technology, without exceeding 3.6 volts across a gate or drain-to-source of any transistor in the circuit. The buffer requires a 5 volt supply in addition to the normal (3.3 volt) supply. This buffer has been manufactured in the Lucent Technologies 0.35 /spl mu/m 3 volt technology.","PeriodicalId":300310,"journal":{"name":"Proceedings. Tenth Annual IEEE International ASIC Conference and Exhibit (Cat. No.97TH8334)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"1997-09-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. Tenth Annual IEEE International ASIC Conference and Exhibit (Cat. No.97TH8334)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASIC.1997.617020","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

Abstract

This paper describes an output buffer which is capable of producing a 5 volt output voltage in a 3 volt technology, without exceeding 3.6 volts across a gate or drain-to-source of any transistor in the circuit. The buffer requires a 5 volt supply in addition to the normal (3.3 volt) supply. This buffer has been manufactured in the Lucent Technologies 0.35 /spl mu/m 3 volt technology.
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
3伏技术中的5伏驱动输出缓冲器
本文描述了一种能够在3伏技术中产生5伏输出电压的输出缓冲器,在电路中任何晶体管的栅极或漏源端不超过3.6伏。除了正常(3.3伏)电源外,缓冲器还需要一个5伏的电源。该缓冲器采用朗讯技术0.35 /spl mu/m 3伏技术制造。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
Low power optimization of bit-serial digital filters Applying functional decomposition for depth minimal technology mapping of multiplexer based FPGAs Layout verification to improve ESD/latchup immunity of scaled-down CMOS cell libraries A MAGFET sensor array for digital magnetic signal reading Low voltage and low power design of microwave mixer
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1