Hardware Software Co-design based CPU-FPGA Architecture: Overview and Evaluation

Abstract

Hardware/software co-design (HSCD) is an essential part of the configuration flow of current electronic system-level (ESL) devices [1]. This paper shows an overview of the hardware/software co-design approach, which aims to study the algorithmic and temporal limitations to design a robust architecture that takes maximum advantage of the desired architecture. In addition, we presented a comparative study of Sobel filters for the preprocessing of image processing algorithms. This study was based on the Intel-Altera CPU-FPGA board. We implemented the algorithm in two different methods, the first one based on the VHDL description language and the second one based on the OpenCL high-level language. The results showed that the use of VHDL has less resource consumption than the OpenCL based implementation. From the results, we can conclude that the use of VHDL takes less resources, but the problem here is the complexity of coding using this HDL. Therefore, OpenCL is very strong in speeding up algorithms that are based on massive data.