High-Throughput and Low-Cost Hardware Accelerator for Privacy Preserving Publishing

Fumito Yamaguchi, H. Nishi
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Abstract

Deep Packet Inspection (DPI) has become crucial for providing rich internet services, such as intrusion and phishing protection, but the use of DPI raises concerns for protecting the privacy of internet users. In this paper, a RAM-based hardware anonymizer is proposed for implementation on a Virtex-5 FPGA device. The results of the hardware anonymizer showed that the proposed architecture reduced circuit usage by 40%.
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高通量和低成本的隐私保护出版硬件加速器
深度包检测(DPI)已经成为提供丰富的互联网服务的关键,如入侵和网络钓鱼保护,但DPI的使用引起了对保护互联网用户隐私的关注。本文提出了一种基于ram的硬件匿名器,并在Virtex-5 FPGA器件上实现。硬件匿名器的结果表明,所提出的架构减少了40%的电路使用。
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