The Design of LVDS Bus with High EMC Compliance

K. Radkovsk, M. Kaska, Z. Motyčka, P. Fiala, P. Drexler, T. Jirků, Z. Szabó, E. Kroutilová
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引用次数: 6

Abstract

The article deals with results which were obtained during the design of LVDS (low voltage differential signaling) bus. This bus is very resistant to interference from the environment and to spurious emission of electromagnetic fields. According to requirements we prepared designs of LVDS by means of numerical methods. The design was realized and its parameters verified experimentally. The basic parameter of bus impedance Z = 100 Omega, frequency f1 = 100 MHz of the first harmonic of rectangle signal.
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高EMC合规性LVDS总线设计
本文讨论了在低压差分信号总线设计过程中得到的一些结果。这种总线能很好地抵抗来自环境的干扰和电磁场的杂散发射。根据要求,采用数值方法编制了LVDS的设计方案。实现了该设计,并对设计参数进行了实验验证。母线阻抗的基本参数Z = 100 ω,频率f1 = 100 MHz的矩形信号的一次谐波。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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