Epitaxial rare earth oxide (EOx) FinFET: A variability-resistant Ge FinFET architecture with multi VT

S. Mittal, S. Kurude, S. Dutta, P. Debashis, S. Ganguly, S. Lodha, A. Laha, U. Ganguly
{"title":"Epitaxial rare earth oxide (EOx) FinFET: A variability-resistant Ge FinFET architecture with multi VT","authors":"S. Mittal, S. Kurude, S. Dutta, P. Debashis, S. Ganguly, S. Lodha, A. Laha, U. Ganguly","doi":"10.1109/DRC.2014.6872315","DOIUrl":null,"url":null,"abstract":"Band to band tunneling (BTBT) is a major challenge in Ge FinFETs due to its smaller band gap. Reduction in BTBT by quantum-confinement (QC) based increase in band-gap requires narrow Wfin. However, Line Edge Roughness (LER) on narrow fins causes large VT variability. Improved fin-width process e.g. SADP [1], ALE [2] have been proposed to reduce LER. Alternatively, variability resistant transistor design has been recently proposed with thin Ge on Si highly retrograde doped fins by our group [3], which also provides multiple VT capability - a major challenge in FinFETs. However, this has 2 challenges - (i) thickness limitation of <; 2nm of defect-free Ge on Si and (ii) RDF in the retrograde doped fins. In this study, we propose a dual-gate structure like FinFET by epitaxially growing undoped Ge /rare earth oxide (e.g. Gd2O3) [4] stack on highly doped Si fins. By statistical simulations, we show that this structure can reduce LER based variability by more than 90% in comparison to FinFETs at a similar performance. RDF is negligible due to the undoped Ge channel. Thicker (>2nm) defect-free Ge can be grown epitaxially on Gd2O3 [4]. We show the multi-VT capability enabled by independent back-gate biasing, and hence provides a significant advantage over FinFETs. Experimental data from MOSCAP with epi Gd2O3 as gate dielectric (~ 4.5 nm) show lower leakage currents than LSTP specification.","PeriodicalId":293780,"journal":{"name":"72nd Device Research Conference","volume":"2013 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"72nd Device Research Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DRC.2014.6872315","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3

Abstract

Band to band tunneling (BTBT) is a major challenge in Ge FinFETs due to its smaller band gap. Reduction in BTBT by quantum-confinement (QC) based increase in band-gap requires narrow Wfin. However, Line Edge Roughness (LER) on narrow fins causes large VT variability. Improved fin-width process e.g. SADP [1], ALE [2] have been proposed to reduce LER. Alternatively, variability resistant transistor design has been recently proposed with thin Ge on Si highly retrograde doped fins by our group [3], which also provides multiple VT capability - a major challenge in FinFETs. However, this has 2 challenges - (i) thickness limitation of <; 2nm of defect-free Ge on Si and (ii) RDF in the retrograde doped fins. In this study, we propose a dual-gate structure like FinFET by epitaxially growing undoped Ge /rare earth oxide (e.g. Gd2O3) [4] stack on highly doped Si fins. By statistical simulations, we show that this structure can reduce LER based variability by more than 90% in comparison to FinFETs at a similar performance. RDF is negligible due to the undoped Ge channel. Thicker (>2nm) defect-free Ge can be grown epitaxially on Gd2O3 [4]. We show the multi-VT capability enabled by independent back-gate biasing, and hence provides a significant advantage over FinFETs. Experimental data from MOSCAP with epi Gd2O3 as gate dielectric (~ 4.5 nm) show lower leakage currents than LSTP specification.
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外延稀土氧化物(EOx) FinFET:具有多VT的抗变Ge FinFET架构
由于带隙较小,带到带隧道(tbbt)是Ge finfet的主要挑战。通过量子约束(QC)增加带隙来降低BTBT需要窄Wfin。然而,窄翅片上的线边缘粗糙度(LER)会导致较大的VT变异性。已提出改进鳍宽工艺,如SADP[1]、ALE[2]来降低LER。或者,我们的团队最近提出了抗变异性晶体管设计,采用薄锗硅高度逆行掺杂的鳍片[3],这也提供了多重VT能力——这是finfet的一个主要挑战。然而,这有两个挑战:(i)厚度限制为2nm)无缺陷的Ge可以在Gd2O3上外延生长[4]。我们展示了由独立的后门偏置实现的多vt能力,因此提供了比finfet显著的优势。以epi Gd2O3为栅极介质(~ 4.5 nm)的MOSCAP实验数据表明,泄漏电流低于LSTP规范。
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