Symbolic sensitivity analysis in the sizing of analog integrated circuits

Abstract

Sensitivity circuit analysis is useful for identifying tolerances of circuit elements to maintain circuit performance features under prescribed target specifications. In the case of integrated circuit (IC) sizing, it is helpful because an analog IC designer can know which elements should be more carefully designed. In this context, we present the application of a graph-based symbolic technique for deriving analytical expressions for differential gain, common-mode gain and then common-mode rejection ratio (CMRR) of operational transconductance amplifiers (OTAs). Afterwards, the sensitivity of each expression with respect to each transistor-parameter is symbolically obtained, and the expression is evaluated from an HSpice simulation. Finally, a comparison between the derived symbolic expressions and HSpice simulations is made to show that the circuit elements causing large sensitivities implies large performance variations.