A comparative study on low power adders using microwind EDA tool

Phaniram Sayapaneni, V. Elamaran
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引用次数: 1

Abstract

From the past few years a variety of low power adders have been proposed to reduce the overall power consumption of micro-electronic systems. The role of adders are important in almost all fields of engineering and applied sciences. With the help of low power adders, all the other systems which make use of adders may dissipate less power. This study presents a detailed comparison between various low power 1-bit full adders. This study focuses mainly on the comparisons among conventional Complementary Metal Oxide Semiconductor (CMOS) adder, bridge style adder, transmission gate adder, square root based adder and static energy recovery full adder, etc. All the simulation results are done using Digital Schematic (DSCH) editor and the functionality is verified using the Microwind layout editor tool. The sole objective of this study to conclude with a better estimate and ease in selecting a low power adder for the required application.
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利用微风EDA工具进行低功率加法器的比较研究
从过去的几年中,各种低功耗加法器已被提出,以降低微电子系统的整体功耗。加法器的作用在几乎所有的工程和应用科学领域都很重要。在低功率加法器的帮助下,所有其他使用加法器的系统都可以消耗更少的功率。本研究详细比较了各种低功耗1位全加法器。本文主要对传统CMOS加法器、桥式加法器、传输门加法器、平方根加法器、静态能量回收全加法器等进行了比较。所有仿真结果均使用DSCH编辑器完成,并使用Microwind布局编辑器工具验证了功能。本研究的唯一目的是得出更好的估计,并为所需应用选择低功耗加法器。
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